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| 99.5.20 multi ldos for cellular-phone R5310L series rev.1.10 - 1 - n outline the R5310L series are multi ldo regulators for power management of cellular phones. all of regulators are low noise and extremely low quiescent current by cmos process. each of these ics consists of eight ldos, voltage detectors, battery monitor, three led drivers, and a ringer driver. each of them can be controlled by cpu via 3-wire serial interface. these ics make it possible to integrate almost power management and analog drivers in cellular-phone systems. the output voltage of two regulators are externally programmable, and other regulators are able to set different output voltage independently by lase r trim as well as detector thresholds. a tiny 32-pin lqfp, 0.5mm lead pitch, is available. n features ultra low standby current .................................................................. 10a typ. with only vr6 is enabled a t no load high accuracy output voltage and detector threshold ...................... 2.0% except programmable vrs. output voltage and detector threshold ............................................... stepwise setting with a step of 0.1v is pos sible except programmable vrs. low temperature-drift-coefficients of output voltage and detector threshold ............................................................................... typ. 100ppm/c low dropout voltage ........................................................................... 150mv at 120ma for vr1 150mv at 80ma for vr2 high ripple rejection .......................................................................... 65db at 1khz for vr1, vr2 and vr 5 60db at 1khz for vr6 and vr7 3-wire serial interface ........................................................................... shut-down for each of regulat ors, except vr6, detectors and drivers. adjusting output voltage for vr3/4 by 8 bit. battery voltage monitor........................................................................ analog output for monitoring bat tery voltage package................................................................................................. lqfp 32pin with 0.5mm l ead pitch n applications portable phones such as gsm, pdc and cdma as well as other analog phones. power supply for battery-powered appliances.
rev.1.10 - 2 - n block diagram l R5310L001b vr1 vr2 vr3 vr4 gnd1 csw1 sck csb data timer tone sr0 sr1 sr2 sr3 sr4 sr5 gnd2 sr6 sr0 to 6 sp0 to 7 sv0 to 7 reset for vr6 logic block sd0 sd1 sd2 sd3 sd4 to sd6 sd7 v dd4 v dd3 v dd2 v dd1 for rf 120ma for rf 80ma for analog block 50ma for cpu 300ma(boost type) for digital part 60ma for motor driver 150ma vd1 for cpu reset vd4 battery protector for pa bias 20ma (v out =1.0v to 3.0v) for agc 20ma (v out =1.0v to 3.0v) vr5 vr6 vr7 vr8 3-wire serial i/f data resistors control logic vd2(lower) vd3(upper) battery monitor led driver 1 cmos output 10ma led driver 2 cmos output 40ma led driver 3 cmos output 100ma 3bitd/a g sen1 g out1 p out3 p out2 p out1 b mon1 b out1 d out2 c d d out1 r out8 r out7 from d out1 8bit voltage output control 8bit voltage output control r out6 r out5 r out4 r out3 r out2 r out1 i bc6 vibrator vp v batt ringer 16 w 200mw key b.l. lcd b.l. received batt. rev.1.10 - 3 - n selection guide in the R5310Lxxxx series, voltage settings for eight regulators and three detectors can be designates. part number is designated as follows: R5310Lxxx x ? part number -- ab code descriptions a serial number for voltage setting from zero to nine b alphabetical code for mask versions: n pin configuration 24 23 22 21 20 19 18 17 1 25 26 27 28 29 30 31 32 16 15 14 13 12 11 10 9 2345678 rev.1.10 - 4 - n pin description l R5310Lxxxb pin no. symbol descriptions 1v dd3 power supply for vr5, vr6, battery monitor, ringer driver 2i bc6 connected to base of external pnp transistor for voltage regulator6, vr6. 3r out6 output pin for vr6. connected to collector of external pnp transistor. 4r out7 output pin for vr7 5v dd4 power supply for vr7, vr8, vd1, 2, 3, 4, logic block 6r out8 output pin for vr8 7g out1 output pin for a ringer driver 8g sen1 feedback pin a ringer driver 9d out2 output pin for voltage detector2 and 3, vd2 and vd3. cmos output. 10 c d pin for an external capacitor for output delay time setting of vd1 11 d out1 output pin for vd1. cmos output. 12 gnd2 ground 13 timer control switch input pin for po1. pulled down through resistor to the gnd internally. 14 tone input pin for tone signal being from base band controller. 15 data the data pin inputs written data in synchronization with shift clock pulses from the sck pin. 16 sck the sck pin is used to input shift clock pulses to synchronize data input to the data pin. 17 csb the csb pin is used to interface with the cpu and is accessible when held at the low level. pulled up through internal resistor. 18 r out1 output pin for vr1 19 csw1 control switch input pin for vr1. pulled down through 300k w to the gnd internally. 20 v dd1 power supply for vr1, vr2 21 r out2 output pin for vr2 22 r out3 output pin for vr3 23 v dd2 power supply for vr3, vr4 24 r out4 output pin for vr4 25 p out3 output port for led driver3 26 p out1 output port for led driver1 27 vp input pin of power supply for p out1 through p out3 being connected to the r out6 externally. 28 p out2 output port for led driver2 29 gnd1 ground 30 b out1 analog output for battery monitor 31 b mon1 sensing pin for battery monitor 32 r out5 output pin for vr5 rev.1.10 - 5 - n absolute maximum ratings symbol item conditions ratings unit v dd supply voltage 6.5 v v in input voltage csb, sck, data, csw1/2/4, tone -0.3 to v dd +0.3 v i out1 output current for vr1 r out1 120 ma i out2 output current for vr2 r out2 80 ma i out3 output current for vr3 r out3 20 ma i out4 output current for vr4 r out4 20 ma i out5 output current for vr5 r out5 50 ma i out7 output current for vr7 r out7 60 ma i out8 output current for vr8 r out8 150 ma i outp1 output current for po1 p out1 10 ma i outp2 output current for po2 p out2 40 ma i outp3 output current for po3 p out3 100 ma mounted on a substrate topt=+25c 1000 mw p d power dissipation in the open air topt=+25c 500 mw topt operating temperature -40 to +85 c tstg storage temperature -55 to +125 c tsolder soldering temperature 260c 10sec n overall characteristics l R5310Lxxxb series symbol item conditions min. typ. max. unit v dd operating voltage 1.5 *note4 6.0 v istandby standby current all regulators are disabled except vr6 at no load 10 20 a r set1 output voltage setting range for vr1 2.5 3.3 v r set2 output voltage setting range for vr2 2.5 3.3 v r set5 output voltage setting range for vr5 2.5 3.3 v r set6 output voltage setting range for vr6 2.5 3.3 v r set7 output voltage setting range for vr7 2.5 3.3 v r set8 output voltage setting range for vr8 compatible with 1.3v vibrator 1.2 1.7 v v set1 detect voltage setting range for vd1, high to low 1.2 3.3 v v set2 detect voltage setting range for vd2, high to low 1.2 3.3 v v set3 reset voltage setting range for vd3, high to low 5.3 6.6 v v set4 reset voltage setting range for vd4, high to low 2.8 3.8 v note1: all of above setting voltages can be designated by user's requirement. note2: the reset voltage is equal to the detect voltage in the vd3 and the vd4, because there is no hysteresis in the vd3. note3: other options are available such as changing output voltage for vr3/4 or specifying reset voltage for vd1/2; contact ricoh for details. note4: this value means the minimum operating voltage of vd1, vd2, vd3, and vd4. rev.1.10 - 6 - n electrical characteristics l R5310L001b voltage regulator1/ vr1: 120ma output for rf / R5310L001b topt=25c symbol item conditions min. typ. max. unit v rout1 output voltage 2.94 3.00 3.06 v v dif1 dropout voltage i out1 =120ma 150 200 mv i ss1 supply current 40 80 a ilim1 current limit v rout1 =0v 60 ma rr1 ripple rejection1 v dd with sinusoidal 0.2vpp, f=1khz 65 db d v out1 / d i out load regulation 1ma i out1 120ma 40 mv d v out1 / d v in line regulation r out1 +0.2v v dd 6.0v 0.05 0.2 %/v d v out1 / d topt output voltage temperature coefficient -40c topt 85c 100 ppm/c unless otherwise provided, v dd =3.6v i out1 =60ma. voltage regulator2/ vr2: 80ma output for rf / R5310L001b topt=25c symbol item conditions min. typ. max. unit v rout2 output voltage 2.94 3.00 3.06 v v dif2 dropout voltage i out2 =80ma 150 200 mv i ss2 supply current 40 80 a ilim2 current limit v rout2 =0v 40 ma rr2 ripple rejection2 v dd with sinusoidal 0.2vpp, f=1khz 65 db d v out2 / d i out load regulation 1ma i out2 80ma 40 mv d v out2 / d v in line regulation r out2 +0.2v v dd 6.0v 0.05 0.2 %/v d v out2 / d topt output voltage temperature coefficient -40c topt 85c 100 ppm/c unless otherwise provided, v dd =3.6v i out2 =40ma. voltage regulator3/ vr3: 20ma programmable output via serial interface / R5310L001b topt=25c symbol item conditions min. typ. max. unit v rout3z output voltage with zero input with input code of decimal zero 0.94 1.0 1.06 v v routf3f output voltage with full input with input code of decimal 255 2.9 3.0 3.1 v dnl3 differential nonlinearity input code=0 to 255 in decimal -1 +1 lsb inl3 integral nonlinearity input code=0 to 255 in decimal -2 +2 lsb res3 output voltage resolution 8 bit v dif3 dropout voltage i out3 =20ma, input code=255 in decimal 150 200 mv i ss3 supply current 250 400 a ilim3 current limit v rout3 =0v 20 ma rr3 ripple rejection3 v dd with sinusoidal 0.2vpp, f=120hz 40 db d v out3 / d i out load regulation input code=255 in decimal 1ma i out3 20ma 40 mv d v out3 / d v in line regulation input code=255 in decimal, r out3f +0.2v v dd 6.0v 0.2 0.4 %/v d v out3 / d topt output voltage temperature coefficient -40c topt 85c 100 ppm/c unless otherwise provided, v dd =3.6v i out3 =10ma. rev.1.10 - 7 - voltage regulator4/ vr4: 20ma programmable output via serial interface / R5310L001b topt=25c symbol item conditions min. typ. max. unit v rout4z output voltage with zero input with input code of decimal zero 0.94 1.00 1.06 v v routf4f output voltage with full input with input code of decimal 255 2.9 3.0 3.1 v dnl4 differential non-linearity input code=0 to 255 in decimal -1 +1 lsb inl4 integral non-linearity input code=0 to 255 in decimal -2 +2 lsb res4 output voltage resolution 8 bit v dif4 dropout voltage i out4 =20ma, input code=255 in decimal 150 200 mv i ss4 supply current 250 400 a ilim4 current limit v rout4 =0v 20 ma rr4 ripple rejection4 v dd with sinusoidal 0.2vpp, f=120hz 40 db d v out4 / d i out load regulation input code=255 in decimal 1ma i out4 20ma 40 mv d v out4 / d v in line regulation input code=255 in decimal, r out4f +0.2v v dd 6.0v 0.2 0.4 %/v d v out4 / d topt output voltage temperature coefficient -40c topt 85c 100 ppm/c unless otherwise provided, v dd =3.6v i out4 =10ma. voltage regulator5/ vr5: 50ma output for analog / R5310L001b topt=25c symbol item conditions min. typ. max. unit v rout5 output voltage 2.94 3.00 3.06 v v dif5 dropout voltage i out5 =50ma 150 200 mv i ss5 supply current 40 80 a ilim5 current limit v rout5 =0v 25 ma rr5 ripple rejection5 v dd with sinusoidal 0.2vpp, f=1khz 65 db d v out5 / d i out load regulation 1ma i out5 50ma 40 mv d v out5 / d v in line regulation r out5 +0.2v v dd 6.0v 0.05 0.2 %/v d v out5 / d topt output voltage temperature coefficient -40c topt 85c 100 ppm/c unless otherwise provided, v dd =3.6v i out5 =25ma. voltage regulator6/ vr6: 300ma output for base band with external pnp transistor / R5310L001b topt=25c symbol item conditions min. typ. max. unit v rout6 output voltage i out6 =150ma 2.94 3.00 3.06 v v dif6 dropout voltage i out6 =300ma 150 200 mv ilim6 current limit v rout6 =0v 3 7 20 ma rr6 ripple rejection6 v dd with sinusoidal 0.2vpp, f=1khz 60 db d v out6 / d i out load regulation 1ma i out6 300ma 40 mv d v out6 / d vin line regulation i out6 =150ma, r out6 +0.2v v dd 6.0v 0.05 0.2 %/v d v out6 / d topt output voltage temperature coefficient -40c topt 85c 100 ppm/c unless otherwise provided, v dd =3.6v i out6 =300ma. rev.1.10 - 8 - voltage regulator7/ vr7: 60ma output for base band / R5310L001b topt=25c symbol item conditions min. typ. max. unit v rout7 output voltage 2.45 2.50 2.55 v v dif7 dropout voltage i out7 =60ma 200 *1 mv i ss7 supply current 40 80 a ilim7 current limit v rout7 =0v 30 ma rr7 ripple rejection5 v dd with sinusoidal 0.2vpp, f=1khz 65 db d v out7 / d i out load regulation 1ma i out7 60ma 40 mv d v out7 / d v in line regulation 3.2v v dd 6.0v 0.05 0.2 %/v d v out7 / d topt output voltage temperature coefficient -40c topt 85c 100 ppm/c unless otherwise provided, v dd =3.6v i out7 =30ma. *1: vdd cannot be set at equal or less than v det2 , therefore, actual measurement is impossible, this value is only guaranteed by design. voltage regulator8/ vr8: 150ma output for vibrator / R5310L001b topt=25c symbol item conditions min. typ. max. unit v rout8 output voltage 1.247 1.300 1.353 v v dif8 dropout voltage i out8 =150ma 1300 *2 mv i ss8 supply current 5 15 a ilim8 current limit v rout8 =0v 75 ma rr8 ripple rejection5 v dd with sinusoidal 0.2vpp, f=120hz 40 db d v out8 / d i out load regulation 1ma i out5 150ma 40 mv d v out8 / d v in line regulation 3.2v v dd 6.0v 0.05 0.2 %/v d v out8 / d topt output voltage temperature coefficient -40c topt 85c 100 ppm/c unless otherwise provided, v dd =3.6v i out8 =75ma. *2: v dd cannot be set at equal or less than v det2 , therefore, actual measurement is impossible, this value is only guaranteed by design. voltage detector1/ vd1: for cpu reset with external capacitor / R5310L001b topt=25c symbol item conditions min. typ. max. unit v det1 detect voltage 2.646 2.700 2.754 v v hys1 hysteresis range v det1 1.5% v det1 3% v det1 5% v v dir6 margin to released voltage r out6 -v det1 released voltage 50 219 mv t vdet1 output delay time c d =0.15f 50 100 200 ms d v det1 / d topt detector threshold temperature coefficient topt=-40c to +85c 100 ppm/c voltage detector2/ vd2: for battery low voltage detection / R5310L001b topt=25c symbol item conditions min. typ. max. unit v det2 detect voltage 2.94 3.00 3.06 v v hys2 hysteresis range v det2 1.5% v det2 3% v det2 5% v d v det2 / d topt detector threshold temperature coefficient topt=-40c to +85c 100 ppm/c rev.1.10 - 9 - voltage detector3/ vd3: for excess input voltage detection / R5310L001b topt=25(c symbol item conditions min. typ. max. unit v det3 reset voltage 6.048 6.300 6.552 v d v det3 / d topt detector threshold temperature coefficient topt=-40c to +85c 100 ppm/c voltage detector4/ vd4: for backup battery protection / R5310L001b topt=25c symbol item conditions min. typ. max. unit v det4 reset voltage 3.212 3.450 3.688 v d v det4 / d topt detector threshold temperature coefficient topt=-40c to +85c 100 ppm/c output port 1/ 10ma: for led driver1 / R5310L001b topt=25c symbol item conditions min. typ. max. unit v poh1a h output voltage i oh1 =-10ma, v vp =v rout6 , v dd =r out6 +0.2v to 6v v vp -0.5 v v poh1b h output voltage i oh =-10ma, v vp =v dd =r out6 +0.2v to 6v v vp -0.4 v v pol1 l output voltage i ol =1ma, v vp =r out6 or v dd , v dd =r out6 +0.2v to 6v 0.4 v unless otherwise provided, r set6 =3.0v output port 2/ 40ma: for led driver2 / R5310L001b topt=25c symbol item conditions min. typ. max. unit v poh2a h output voltage i oh1 =-40ma, v vp =v rout6 , v dd =r out6 +0.2v to 6v v vp -0.5 v v poh2b h output voltage i oh =-40ma, v vp =v dd =r out6 +0.2v to 6v v vp -0.4 v v pol2 l output voltage i ol =1ma, v vp =r out6 or v dd , v dd =r out6 +0.2v to 6v 0.4 v unless otherwise provided, r set6 =3.0v output port 3/ 100ma: for led driver3 / R5310L001b topt=25c symbol item conditions min. typ. max. unit v poh2a h output voltage i oh1 =-100ma, v vp =v rout6 , v dd = r out6 +0.2v to 6v v vp -0.5 v v poh2b h output voltage i oh =100ma, v vp =v dd =r out6 +0.2v to 6v v vp -0.4 v v pol2 l output voltage i ol =1ma, v vp =r out6 or v dd , v dd = r out6 +0.2v to 6v 0.4 v unless otherwise provided, r set6 =3.0v rev.1.10 - 10 - ringer controller / R5310L001b topt=25c symbol item conditions min. typ. max. unit f ig tone pulse frequency r lg =16 w dc 10 khz r lg resistive load nominal number 6 32 w c lg capacitive load r lg =16 w 1000 pf v g7 output voltage for g sen1 pin with input code of seven ringer switch bit='1', input code to the ev is seven in decimal. r lg =16 w v rout5 - 0.1 v rout5 v rout5 + 0.1 v v g0 output voltage for g sen1 pin with input code of zero ringer switch bit='1', input code to the ev is zero in decimal. r lg =16 w typ- 2db v rout5 - 21db typ+ 1.5db v v goff output voltage for g sen1 pin with ringer switch bit of zero ringer switch bit='0' r lg =16 w 00.05v res gev electronic volume resolution 3 bit v gev27 electronic volume step r lg =16 w , each step of input code from 2 to 7 2.5 3 3.5 db v gev12 electronic volume step r lg =16 w , each step of input code from 1 to 2 2.4 3 3.6 db v gev01 electronic volume step r lg =16 w , each step of input code from 0 to 1 2.2 3 3.8 db i scr current limit g sen =0v 2.5 5 10 ma i ssg supply current r lg =16 w 600 900 a r set5 =3.0v battery monitor: analog output / R5310L001b topt=25c symbol item conditions min. typ. max. unit v bout1a output voltage i out =0a, b mon1 =3.2 to 6v, v dd =6v 0.66 b mon1 - 2% 0.66 b mon1 0.66 b mon1 + 2% v v bout1b output voltage i out =0a, b mon1 =v dd =3.2 to 6v 0.66 b mon1 - 2% 0.66 b mon1 0.66 b mon1 + 2% v r bo1 output impedance 2.7k 5k w i ssbo1 supply current battery monitor switch bit='1' 300 500 a d v bout1 / d topt output voltage temperature coefficient 100 ppm/c rev.1.10 - 11 - digital input / output conditions / R5310L001b topt=25c symbol item pins min. typ. max. unit v ih1 h input voltage csw1, 2, 4, tone 0.8 v rout6 v dd + 0.3 v v ih2 h input voltage csb, sck, data *1 0.8 v rout6 v rout6 v v il l input voltage csb, sck, data, csw1, 2, 4, tone -0.3 0.2 v rout6 v v hys hysteresis range csb, sck, data, csw1, 2, 4, tone 0.25 v rout6 v v oh1 h output voltage d out1 , d out2 , i oh =0ma v rout6 - 0.4 v v oh2 h output voltage d out1 , d out2 , i oh =-0.2ma v rout6 - 0.4 v v ol l output voltage d out1 , d out2 , i ol =1ma 0.4 v r pu pull-up resistance csb, sck, data 0.12 0.3 0.8 m w r pd pull-down resistance csw1, 2, 4, tone 0.12 0.3 0.8 m w *1: the pins specified as above are pulled up to the r out6 pin through resistors internally. therefore the higher input voltage than v rout6 cause a rising of v rout6 incorrectly, particularly with small load current. ac characteristics / R5310L001b v dd =3.6v, v ss =0v, c l =20pf, topt=25c symbol item min. typ. max. unit t ceh sck to csb h hold time 100 ns t ces csb to sck setup time 200 ns t cel sck to csb l hold time 100 ns t sck sck cycle 500 ns t ckl sck l time 250 ns t ckh sck h time 250 ns t ds data to sck setup time 100 ns t dh sck to data hold time 100 ns rev.1.10 - 12 - timing diagram csb sck t ceh t ces t sck t ds t dh t ckl t ckh t cel data v ih =0.8 v rout6 v il =0.2 v rout6 rev.1.10 - 13 - n functional description 1. 3-wire serial interface 1-1. data transfer summary sck csb data d0 0 d1 1 d2 2 d3 3 d4 4 d5 5 d6 6 d7 7 d8 0 d9 1 d10 2 d11 3 d12 4 d13 5 d14 6 d15 7 all data transfers are initiated by driving the csb input low. the csb input serves two functions. first, csb turns on the control logic which allows access to the shift register for the address/command sequence. second, the csb signal provides a method of terminating data transfer. a clock cycle is a sequence of a falling edge followed by a rising edge. for data inputs, data must be valid during the rising edge of the clock. all data transfer terminates if the csb input is high. data transfer is illustrated as above. 1-2. command byte 76543210 d7 d6 d5 d4 d3 d2 d1 d0 the command byte is shown as above. each data transfer is initiated by a command byte. the lsb (bit zero) must be a logic zero. an any data for each of bit six and bit seven which might be zero or one, is ignored. bits one through five specify the designated registers to be input. the command byte is always input starting with the lsb (bit zero). 1-3. data input following the eight sck cycles that input a write command byte, a data byte is input on the rising edge of the next eight sck cycles. and any successive instruction set which consists of command byte and data byte is allowable. the data byte is always input starting with the lsb (bit zero). 1-4. regulator switch each of regulators can be enabled or disabled independently. in the vr switch register, designations for each of seven regulators' on/off can be written to bit zero through six. bit seven is ignored. 1-5. battery monitor / led drivers / ringer controller an analog output of cell voltage monitor is available with enable switch. three of constant voltage outputs for leds and a ringer controller can be independently on/off. all of those enable switches are controlled by output port register. bit zero and one through three are for enable switch of battery monitor and led drivers respectively. bit four through six is input digit of electronic volume for ringer controller, bit four is defined as the lsb. bit seven is en able switch for ringer controller. 1-6. programmable voltage regulators /vr3, 4 the output voltage of vr3 and vr4 can be controlled externally by written data to the vr3/vr4 output registers. vr3 outputs from 0.5v to 2.492v, vr4 outputs from 1.008v to 3.0v with eight bit resolution for each. bit zero of each register is the lsb. rev.1.10 - 14 - 1-7. register address / register definition vr switch register address d7 d6 d5 d4 d3 d2 d1 d0 - -00010- vr switch register definition d15 d14 d13 d12 d11 d10 d9 d8 - vr8 vr7 vr5 vr4 vr3 vr2 vr1 - 1:vr7=on 0:vr7=off 1:vr6=on 0:vr6=off 1:vr5=on 0:vr5=off 1:vr4=on 0:vr4=off 1:vr3=on 0:vr3=off 1:vr2=on 0:vr2=off 1:vr1=on 0:vr1=off output port register address d7 d6 d5 d4 d3 d2 d1 d0 - -10010- output port register definition d15 d14 d13 d12 d11 d10 d9 d8 rng ev2 ev1 ev0 o3 o2 o1 vmb 1: ringer controller on 0: ringer controller off ev0 through ev2 defines input digit of 3 bit electronic volume for ringer. ev0 (d4) is the lsb 1: led driver3 on 0: led driver3 off 1: led driver2 on 0: led driver2 off 1: led driver1 on 0: led driver1 off 1: battery monitor on 0: battery monitor off vr3 output register address d7 d6 d5 d4 d3 d2 d1 d0 - -01010- vr3 output register definition d15 d14 d13 d12 d11 d10 d9 d8 da37 da36 da35 da34 da33 da32 da31 da30 da30 through da37 defines input codes of dac for vr3. data must be input starting with da30 (lsb) vr4 output register address d7 d6 d5 d4 d3 d2 d1 d0 - -11010- vr4 output register definition d15 d14 d13 d12 d11 d10 d9 d8 da47 da46 da45 da44 da43 da42 da41 da40 da40 through da47 defines input codes of dac for vr4. data must be input starting with da40 (lsb) *note: initial condition of dac code for vr3 and 4 is ff. (full code) rev.1.10 - 15 - 1-8. operation after interrupt procedure in the case that csb input becomes to high by interrupting while a command-set which has not yet been acknowledged, the command-set is disabled by internal reset signal, therefore, after this case, transaction should be executed from the initial condition. 2. voltage regulators embedded 8 regulators are classified into 4 groups as follows by their characteristics: [high speed type] vr1, 2, 5, 7 with high ripple rejection (typ. 65db at 1khz) and low noise, they are suitable for rf and analog circuits. and the load transient response is also good, therefore they are recommendable for dsp which requires fast dynamic response to load current. [adjustable output voltage type] vr3, 4 they include 8-bit d/a converter (guaranteed monotonous increase) each, users can select output voltage in a range by 3- wire serial interface control. they are suitable for various applications which do not require much load current (max. 20ma), such as pa bias, agc, lcd luminance adjuster and can be used as voltage references. [boost type] vr6 vr6 is used with an external pnp transistor and can supply large output current. this regulator is always on, therefore its supply current is enough minimized to save invalid current by design (typ. 6a). [for vibrator] vr8 vr8 can drive a vibrator (which requires 1.3v as a supply voltage) directly. 3. voltage detectors vd1 monitors the voltage of vr6, when the voltage becomes lower than setting detector threshold voltage, d out1 pin becomes l, and internal logic is initialized, furthermore does not accept input signal. it is suitable for reset cpu. output type is nch open drain and pull-up resistance to vr6. setting output delay time (reset released delay time) is possible with connecting an external capacitance to c d pin. the formula which shows the relation between external capacitance value (c d ) and output delay time is as follows: td=0.67 10 6 c d vd2 monitors v dd voltage, when the voltage becomes lower than setting output voltage threshold, d out2 becomes l, and disables vr6. it is suitable for detecting cutting off a battery voltage in a flash and can be used to set a operation starting voltage. output type is cmos and its h level equals to voltage of r out6 . vd3 monitors also v dd voltage, when the voltage becomes higher than setting output threshold, vd3 disables vr6. it is necessary to protect circuits from large input voltage. vd4 monitors the voltage of vr6, when the voltage becomes higher than setting output threshold, it disables vr6 and protect a coin battery for backup. when r out6 is equal or less than setting output threshold, vr6 turns on again. thus, the operation is repeated until vr6 outputs normal voltage. 4. ringer controller ringer controller is composed with an external pnp transistor. it can control a ringer in the range from 6 w to 32 w . by 3-wire interface controller, on and off, 3bit electrical volume can be controlled. the output is also controlled to accept on command and input signal of tone pin via 3-wire interface, thus it can generate any melody. output condition via 3- wire interface controller inputs and tone input is shown below: 3-wire input tone input ringer output supply current (for ringer controller circuit part) 0 (off) 0 or 1 off (almost 0a) 1 (on) 0 off (standby) (approximately 500a) 1 (on) 1 on (approximately 100a (only for internal circuit)) rev.1.10 - 16 - 5. led drivers 3 led drivers are embedded and each of them can control independently, and on/off condition can be controlled via 3-wire interface. p out1 is applicable for display of receiving a call. output is controlled with on command or input signal for timer pin via 3-wire interface, lighting and flashing can be set freely. p out2 can be used to drive an lcd back-light, p out3 is for a back-light for keys. p out2 and p out3 is controlled only via 3-wire interface. the source for p out1 to 3 is vp pin. users can connect it to v dd or r out6 . output type is cmos, thus they can be used as general output ports. 6. voltage monitor voltage monitor is composed with connecting a pch mos switch to an upper part of divider resistors. it can be on and off via 3-wire interface. when it is on state, the voltage of monitor pin or b mon1 is divided with a specific ratio and output to b out1 pin. when it is off state, b mon1 is on high impedance condition, thus b out1 is pulled down through a resistance (the value is approximately 8k w ) to gnd. rev.1.10 - 17 - n technical notes l operation with rising and falling of supply voltage 1. supply voltage condition --- from 0v to a designated voltage to make the explanation be easier, we call a voltage which is monitored and rising voltage threshold, as released voltage. on the contrary, we call the falling voltage threshold as detector threshold voltage. and the difference between them is specified as a hysteresis voltage. while the supply voltage is from 0v to vd2 (released voltage), all the circuits except vds are off state, thus both levels of d out1 and 2 are l. however, we cannot guarantee the operation with a v dd at voltage below the minimum operating voltage (v ddmin ) with both a rising and a falling conditions. when the supply voltage crosses over the released voltage for vd2, d out2 becomes h and vr6 is enabled. further, when r out6 crosses over the released voltage for vd1, after a setting delay time by an external capacitor to c d pin, d out1 becomes h, then internal logic circuits and reset condition for input control pins (3-wire interface inputs and cswx etc.) are released. therefore circuits' operations can become to control by these input pins. 2. supply voltage condition --- from a designated voltage to 0v when the supply voltage becomes lower than detector threshold voltage for vd2, d out2 becomes l and disables vr6. further, vr6 level becomes lower than detector threshold voltage for vd1, then d out1 becomes l and reset internal logic circuits and input controller pins (3-wire inputs and cswx etc.) then all the circuits except vds are off (see the note below), and input signals for control are not accepted. the lower voltage than this is as same as above. rev.1.10 - 18 - n test circuits v out r out4 r out3 r out2 r out1 p out3 p out1 v out v out v dd i out i out i out i out i out v out v out i out i out i out v out v out v out 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m v dd2 v dd1 csw1 csb sck data tone timer 17 24 25 32 16 9 8 gnd2 d out1 d out2 c d 0.15 m vp p out2 gnd1 b out1 bmon1 r out5 r out6 r out7 r out8 g out1 g sen1 v dd3 v dd4 1 2sb799 ibc6 figure-1: standard test circuit rev.1.10 - 19 - v dd i dd 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 0.15 m 2sb799 a r out4 r out3 r out2 r out1 p out3 p out1 v dd2 v dd1 csw1 csb sck data tone timer 17 24 25 32 16 9 8 gnd2 d out1 d out2 c d vp p out2 gnd1 b out1 bmon1 r out5 r out6 r out7 r out8 g out1 g sen1 v dd3 v dd4 1 ibc6 figure-2: test circuit for supply current rev.1.10 - 20 - v out v out v out v dd i out i out i out i out i out v out v out i out i out i out v out v out v out 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 0.15 m vp 2sb799 p.g. r out4 r out3 r out2 r out1 p out3 p out1 v dd2 v dd1 csw1 csb sck data tone timer 17 24 25 32 16 9 8 gnd2 d out1 d out2 c d vp p out2 gnd1 b out1 bmon1 r out5 r out6 r out7 r out8 g out1 g sen1 v dd3 v dd4 1 ibc6 figure-3: test circuit for ripple rejection rev.1.10 - 21 - v dd 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 0.15 m 2sb799 vd out1 vro6 v r out4 r out3 r out2 r out1 p out3 p out1 v dd2 v dd1 csw1 csb sck data tone timer 17 24 25 32 16 9 8 gnd2 d out1 d out2 c d vp p out2 gnd1 b out1 bmon1 r out5 r out6 r out7 r out8 g out1 g sen1 v dd3 v dd4 1 ibc6 figure-4: test circuit for detector threshold level of vd1 rev.1.10 - 22 - v dd vro6 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 0.15 m 2sb799 p.g. v r out4 r out3 r out2 r out1 p out3 p out1 v dd2 v dd1 csw1 csb sck data tone timer 17 24 25 32 16 9 8 gnd2 d out1 d out2 c d vp p out2 gnd1 b out1 bmon1 r out5 r out6 r out7 r out8 g out1 g sen1 v dd3 v dd4 1 ibc6 figure-5: test circuit for released voltage level of vd1 rev.1.10 - 23 - v dd 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 0.15 m 2sb799 v vd out2 r out4 r out3 r out2 r out1 p out3 p out1 v dd2 v dd1 csw1 csb sck data tone timer 17 24 25 32 16 9 8 gnd2 d out1 d out2 c d vp p out2 gnd1 b out1 bmon1 r out5 r out6 r out7 r out8 g out1 g sen1 v dd3 v dd4 1 ibc6 figure-6: test circuit for characteristics of vd2 and vd3 rev.1.10 - 24 - v dd 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 0.15 m 2sb799 v out v out v out i out i out i out r out4 r out3 r out2 r out1 p out3 p out1 v dd2 v dd1 csw1 csb sck data tone timer 17 24 25 32 16 9 8 gnd2 d out1 d out2 c d vp p out2 gnd1 b out1 bmon1 r out5 r out6 r out7 r out8 g out1 g sen1 v dd3 v dd4 1 ibc6 figure-7: test circuit for characteristics of led drivers rev.1.10 - 25 - v dd 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 0.15 m 16 w 2sb799 2sb799 v out r out4 r out3 r out2 r out1 p out3 p out1 v dd2 v dd1 csw1 csb sck data tone timer 17 24 25 32 16 9 8 gnd2 d out1 d out2 c d vp p out2 gnd1 b out1 bmon1 r out5 r out6 r out7 r out8 g out1 g sen1 v dd3 v dd4 1 ibc6 figure-8: test circuit for characteristics of ringer controller rev.1.10 - 26 - v dd v bmon1 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 4.7 m 0.15 m 2sb799 v out r out4 r out3 r out2 r out1 p out3 p out1 v dd2 v dd1 csw1 csb sck data tone timer 17 24 25 32 16 9 8 gnd2 d out1 d out2 c d vp p out2 gnd1 b out1 bmon1 r out5 r out6 r out7 r out8 g out1 g sen1 v dd3 v dd4 1 ibc6 figure-9: test circuit for characteristics of voltage monitor rev.1.10 - 27 - n typical characteristics 1) output voltage vs. temperature 3.10 3.00 2.90 temperature topt ( c) -50 50 100 0 output voltage v out (v) 3.05 2.95 regulator1 (3v) v dd =3.6v i out =60ma 3.10 3.00 2.90 temperature topt ( c) -50 50 100 0 output voltage v out (v) 3.05 2.95 regulator2 (3v) v dd =3.6v i out =40ma 3.10 3.00 2.90 temperature topt ( c) -50 50 100 0 output voltage v out (v) 3.05 2.95 regulator3 (3v) v dd =3.6v i out =10ma 3.10 3.00 2.90 temperature topt ( c) -50 50 100 0 output voltage v out (v) 3.05 2.95 regulator4 (3v) v dd =3.6v i out =10ma 3.10 3.00 2.90 temperature topt ( c) -50 50 100 0 output voltage v out (v) 3.05 2.95 regulator5 (3v) v dd =3.6v i out =25ma 3.10 3.00 2.90 temperature topt ( c) -50 50 100 0 output voltage v out (v) 3.05 2.95 regulator6 (3v) v dd =3.6v i out =150ma rev.1.10 - 28 - 2.60 2.50 2.40 temperature topt ( c) -50 50 100 0 output voltage v out (v) 2.55 2.45 regulator7 (2.5v) v dd =3.6v i out =30ma 1.40 1.30 1.20 temperature topt ( c) -50 50 100 0 output voltage v out (v) 1.35 1.25 regulator8 (1.3v) v dd =3.6v i out =75ma 2) supply current vs. temperature 80 100 40 0 temperature topt ( c) -50 50 100 0 supply current i ss ( m a) 60 20 regulator1 (3v) v dd =3.6v 80 100 40 0 temperature topt ( c) -50 50 100 0 supply current i ss ( m a) 60 20 regulator2 (3v) v dd =3.6v 400 500 200 0 temperature topt ( c) -50 50 100 0 supply current i ss ( m a) 300 100 regulator3 (3v) v dd =3.6v 400 500 200 0 temperature topt ( c) -50 50 100 0 supply current i ss ( m a) 300 100 regulator4 (3v) v dd =3.6v rev.1.10 - 29 - v dd =3.6v 80 60 20 100 40 0 temperature topt ( c) -50 50 100 0 supply current i ss ( m a) regulator5 (3v) v dd =3.6v 80 60 20 100 40 0 temperature topt ( c) -50 50 100 0 supply current i ss ( m a) regulator7 (2.5v) v dd =3.6v 20 30 10 0 temperature topt ( c) -50 50 100 0 supply current i ss ( m a) regulator8 (1.3v) 3) dropout voltage vs. temperature i out =120ma 200 300 100 0 temperature topt ( c) regulator1 (3v) -50 50 100 0 dropout voltage v dif (mv) i out =80ma 200 300 100 0 temperature topt ( c) regulator2 (3v) -50 50 100 0 dropout voltage v dif (mv) rev.1.10 - 30 - i out =20ma 200 300 100 0 temperature topt ( c) -50 50 100 0 dropout voltage v dif (mv) regulator3 (3v) i out =20ma 200 300 100 0 temperature topt ( c) -50 50 100 0 dropout voltage v dif (mv) regulator4 (3v) i out =50ma 200 300 100 0 temperature topt ( c) -50 50 100 0 dropout voltage v dif (mv) regulator5 (3v) i out =300ma 200 300 100 0 temperature topt ( c) -50 50 100 0 dropout voltage v dif (mv) regulator6 (3v) 4) standby current vs. temperature v dd =3.6v 20 30 10 0 temperature topt ( c) R5310L001b -50 50 100 0 standby current i ss ( m a) rev.1.10 - 31 - 5) detector threshold level and released voltage vs. temperature 2.75 2.80 2.70 2.65 2.60 temperature topt ( c) -50 50 100 0 detector threshold v det1 (v) detector1 (2.7v) 3.05 3.10 3.00 2.90 temperature topt ( c) -50 50 100 0 detector threshold v det2 (v) 2.95 detector2 (3.0v) 6.4 6.6 6.2 6.0 temperature topt ( c) -50 50 100 0 released voltage v det3 (v) detector3 (6.3v) 6) detector1 power-on reset delay time vs. temperature v dd =3.6v c d =0.15 m f 200 300 100 0 temperature topt ( c) detector1 (2.7v) -50 50 100 0 power-on reset delay time t d1 (ms) rev.1.10 - 32 - 7) digital input-output resistance vs. temperature 0.8 0.6 1.0 0.4 0.2 0.0 temperature topt ( c) -50 50 100 0 pull-up resistance r pu (m w ) pull-up resistance 0.8 1.0 0.4 0.0 temperature topt ( c) -50 50 100 0 pull-down resistance r pd (m w ) 0.6 0.2 pull-down resistance rev.1.10 - 33 - n typical application l R5310Lxxxb 10 m f 10 m f 10 m f 10 m f 10 m f 0.15 m f 10 m f 10 m f 10 m f 4.7 m f 4.7 m f 4.7 m f 24 32 18 r out4 v dd2 r out3 r out2 v dd1 csw1 r out1 csb p out3 p out3 p out2 r out5 17 16 120ma for rf 20ma for agc 80ma for rf 20ma for pa bias key b.l. received 25 lcd b.l. 40ma 50ma 300ma for cpu 60ma for digital block 150ma for vibrator 10ma 100ma vp gnd1 b mcn1 vr4 vr3 vr2 vr1 out out out out out in csw d/a out out in csw in csw in csw in csw in csw d/a in csw in csw logic block schmit trigger level shifter 3 wired serial i/f data registers b.mon batt. 2sb799 2sb799 16 w 200mw ringer 9 sck da ta to ne timer gnd d out1 d out2 c d r out6 i/p c o n t en r out5 vd1 cpu supervisor vr v dd3 vd2/vd3 batt. supervisor 3bit d/a v dd3 v dd4 i bc6 r out6 r out7 r out8 g out gsen vr7 vr6 vr5 vr8 b out1 vibrator rev.1.10 - 34 - n package dimension 24 23 22 21 20 19 18 17 32 31 30 29 28 27 26 25 16 15 14 13 12 11 10 9 1 2345678 7.0 0.3 5.0 0.2 5.0 0.2 7.0 0.3 0.5 0.22 0.1 t=1.7 max unit : mm |
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